Fields¶
The module has been split into two blocks: the inputs, which controls the ADC; and the outputs, which control the DAC.
| Name | Type | Description |
|---|---|---|
| IN.GAIN1_REG | extension_write | |
| IN.GAIN2_REG | extension_write | |
| IN.GAIN3_REG | extension_write | |
| IN.GAIN4_REG | extension_write | |
| IN.GAIN5_REG | extension_write | |
| IN.GAIN6_REG | extension_write | |
| IN.GAIN7_REG | extension_write | |
| IN.GAIN8_REG | extension_write | |
| IN.GAIN1 | param enum | ADC input gain |
| IN.GAIN2 | param enum | ADC input gain |
| IN.GAIN3 | param enum | ADC input gain |
| IN.GAIN4 | param enum | ADC input gain |
| IN.GAIN5 | param enum | ADC input gain |
| IN.GAIN6 | param enum | ADC input gain |
| IN.GAIN7 | param enum | ADC input gain |
| IN.GAIN8 | param enum | ADC input gain |
| IN.VAL1 | pos_out | ADC Channel 1 Data |
| IN.VAL2 | pos_out | ADC Channel 2 Data |
| IN.VAL3 | pos_out | ADC Channel 3 Data] |
| IN.VAL4 | pos_out | ADC Channel 4 Data |
| IN.VAL5 | pos_out | ADC Channel 5 Data |
| IN.VAL6 | pos_out | ADC Channel 6 Data |
| IN.VAL7 | pos_out | ADC Channel 7 Data |
| IN.VAL8 | pos_out | ADC Channel 8 Data |
| IN.TTL | bit_out | 5V TTL input (CLOCK) |
| IN.ADC_B_FITTED | read enum | Whether ADC B inputs are connected |
| OUT.VAL1 | pos_mux | DAC Channel 1 Data |
| OUT.VAL2 | pos_mux | DAC Channel 2 Data |
| OUT.VAL3 | pos_mux | DAC Channel 3 Data |
| OUT.VAL4 | pos_mux | DAC Channel 4 Data |
| OUT.GAIN1 | param enum | DAC output gain |
| OUT.GAIN2 | param enum | DAC output gain |
| OUT.GAIN3 | param enum | DAC output gain |
| OUT.GAIN4 | param enum | DAC output gain |
| OUT.DAC_FITTED | read enum | Whether DAC outputs are connected |
Clock note¶
The ADC runs at 1MHz